Ph.D. Candidate
Electronic and Computer Engineering Department, HKUST
Mengming Li (李孟明) is a Ph.D. candidate at the Electronic and Computer Engineering Department of the Hong Kong University of Science and Technology (HKUST), advised by Prof. Zhiyao Xie. Before joining HKUST, he received his Master’s degree at Zhejiang University, advised by Prof. Kai Bu, and his Bachelor’s degree from Guangdong Ocean University. He has authored multiple papers published in top-tier computer architecture conferences, including ISCA, MICRO, HPCA, and ASPLOS.
Research Interests
- Cache System Optimization
- Profile-Guided Optimization (PGO)
- Side Channel Attack and Defense
- AI for Chip Design
Selected Publications
A complete list of publications is available on my Publications page.
ISCA'26 ICP: Exploiting Instruction Correlation for Prefetching Irregular Memory Accesses
Mengming Li, Chenlu Miao, Buqing Xu, Qijun Zhang, Xiangfeng Sun, Ceyu Xu, Yuan Xie, Wenkai Li, Shang Liu, and Zhiyao Xie
International Symposium on Computer Architecture (ISCA), 2026.
ASPLOS'26 PF-LLM: Large Language Model Hinted Hardware Prefetching
Ceyu Xu, Xiangfeng Sun, Weihang Li, Chen Bai, Bangyan Wang, Mengming Li†, Zhiyao Xie, and Yuan Xie († Corresponding Author)
ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2026.
Best Paper Award
ISCA'25 Profile-Guided Temporal Prefetching [PDF]
Mengming Li, Qijun Zhang, Yichuan Gao, Wenji Fang, Yao Lu, Yongqing Ren, and Zhiyao Xie
International Symposium on Computer Architecture (ISCA), 2025.
HPCA'25 Integrating Prefetcher Selection with Dynamic Request Allocation Improves Prefetching Efficiency [PDF]
Mengming Li, Qijun Zhang, Yongqing Ren, and Zhiyao Xie
IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2025.
ISEDA'25 SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model
Mengming Li, Wenji Fang, Qijun Zhang, and Zhiyao Xie
International Symposium of EDA (ISEDA), 2025.
TCAD'25 An Architecture-Level CPU Modeling Framework for Power and Other Design Qualities
Qijun Zhang, Mengming Li, Andrea Mondelli, and Zhiyao Xie
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2025.
ASPDAC'25 FirePower: Towards a Foundation with Generalizable Knowledge for Architecture-Level Power Modeling
Qijun Zhang, Mengming Li, Yao Lu, and Zhiyao Xie
Asia and South Pacific Design Automation Conference (ASP-DAC), 2025.
DAC'25 AutoPower: Automated Few-Shot Architecture-Level Power Modeling by Power Group Decoupling
Qijun Zhang, Yao Lu, Mengming Li, and Zhiyao Xie
ACM/IEEE Design Automation Conference (DAC), 2025.
TDSC'24 TreasureCache: Hiding Cache Evictions against Side-Channel Attacks [PDF]
Mengming Li, Kai Bu, Chenlu Miao, and Kui Ren
IEEE Transactions on Dependable and Secure Computing (TDSC), 2024.
HPCA'22 unXpec: Breaking Undo-based Safe Speculation [PDF]
Mengming Li, Chenlu Miao, Yilong Yang, and Kai Bu
IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2022.
The first HPCA paper from Zhejiang University
MICRO'22 SwiftDir: Secure Cache Coherence without Overprotection
Chenlu Miao, Kai Bu, Mengming Li, Shaowu Mao, and Jianwei Jia
IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022.
TC'22 Hitchhiker: Accelerating ORAM With Dynamic Scheduling
Jingsen Zhu, Mengming Li, Xingjian Zhang, Kai Bu, Miao Zhang, and Tianqi Song
IEEE Transactions on Computers (TC), 2022.